This is all on the Photoshop web pages.
Yes, Photoshop uses SSE, SSE2, etc.
Yes, Photoshop uses HyperThreading.
The dual Xeon would be the fastest of the systems you have listed.
(And why isn’t Apple an option? They are faster and cost less in the long run.)
Well Chris:
Apple isn’t an option because of the users and the learning curve of teaching some 35+ people how to work on a mac. Also, I dont feel like setting up apple share on our 2k network.
Now where did you see the specs on SSE2 for Photoshop? Can you spare a link?
If you look at the link I provided in my first post, the Athlon MP kept up there with the Xeon in about every test. It didn’t specify if hyperthreading was enabled π on the Xeon though.
Cost is an issue, so maybe I should have called this thread, "Is an Athlon MP a good, cost effective solution?"
If cost wasn’t the issue, I would most definitly build a 246 Opteron config, as they are kicking the out of everything.
Macintoshes can share with Windows servers just fine – no need to change anything on the network.
It’s in the Photoshop web pages on Adobe’s site (plus I wrote half the code).
Yes, Athlon MP is good.
Xeon can be better for many things.
But a G5 is still fastest.
Dude, playing with fire over here on this side. (not that I disagree)
G5 performance == Opteron
r_harvey – No, not even close.
G5 performance == twice a P4 or P4 Xeon.
Opteron == twice a P4 or P4 Xeon
The greatest issue isn’t with the networking, and yes, OSX does make leaps and bounds over the previous OS with this issue. The main problem is user ability and learning. It isn’t worth the company’s money to train all the employees to use this machine. I want to make this an easy and painless transition. BTW: Try using NTFS permissions, which is how our current shares are set, to network an Apple, not fun π Apple share isn’t secure enough to use. 1 password for the whole site π Doesn’t meet our security standards.
The G5 may be twice the performance of a P4 or P4 Xeon, but since I haven’t had the opportunity to use one, I will not jump to assumptions. And they have yet to produce reputable benchmarks to prove this. I cannot find comparing benchmarks on any site that compares (fairly) the G5 against P4, Xeon, Athlon, and Opteron.
Fairly = Best performance using the best compilers available for each architecture.
The Opteron and IBM 970(G5 Proc) are for the most part, the same damn chip, but for the price of a powerful G5, I can build a better Opteron.
The Athlon MP can be built for around $1100-$1300, I have already priced it out. Price/performance is the main issue here. The ratio sets the Athlon MP out front in my opinion unless someone can prove me wrong.
The Opteron and IBM 970(G5 Proc) are for the most part, the same damn chip
They do cross-license some key technologies, and gold pins and stuff look similar.
Fairly = Best performance using the best compilers available for each architecture.
If you’re creating custom applications, the best compiler matters. If you’re using Photoshop, that’s out of your control–you can only compare what’s in the box.
The problem with 970 and Opteron is young compilers. In the case of the Macintosh, the GCC compiler that ships with the current MacOS is oblivious to the new instructions, registers, and optimization rules. GCC has recently improved, and IBM has a nice 970-optimized C/C++ compiler, but it’s a safe bet that any commercial software on the shelf–or shipping soon–will not have been compiled with either. The Opteron story is similar, but the monikers vary.
On both Opteron and G5 — making good use of the cache and DRAM bus is frequently more important than good instrucion issue/scheduling. (which is how I maxed out the bus speed even though the compilers weren’t ready yet π
And yes, we do spend quite a bit of time evaluating compilers and picking the best one for different areas.
I wasn’t harping on the compilers or code utilized by Photoshop. I was directing that comment towards the "suspicious" benchmarking technique used by apple (I cannot remember the company who actually ran the marks) for the G5 debut.
making good use of the cache and DRAM bus is frequently more important than good instruction issue/scheduling
Well… There are several examples where using different instructions can greatly improve performance. Maxing out the bus is useful, but having the code run efficiently is just as important. It’s like having SSE utilize 12 clock cycles to perform a task that can be done in 2 with SSE2. Using SSE the bus is still maxed, but it is running inefficiently, doing more work than necessary.
Well… There are several examples where using different instructions can greatly improve performance.
Pairing, ordering, aligning… if your compiler isn’t on top of it (and none can truly be), any hints or use of register or __inline or a dozen cryptic switches, aren’t the pipeline to the truth. I’ve had instances where I’ve manually unwound loops in C, only to have the compiler de-optimize it… and the other way around, when I wanted compact code, it unwound it all to optimize (and bloat) seldom-used code.
Brute-force SIMD code, manipulating great gobs of data, really should be written by hand. The real world of optimization is messy, and it doesn’t always work.
I can write an accurate x86 benchmark program for you, if you’d like. Just let me know who you’d like to have win.
I can write an accurate x86 benchmark program for you, if you’d like. Just let me know who you’d like to have win.
<grin>
